Capacitors are used to store charge in integrated circuits (ICs) such as in DRAM and SRAM cells. However, the growing demand for increasingly smaller and thus more cost effective semiconductor devices, e.g., with large memory capacities, has pushed the development of miniaturized structures in sub-micron technologies. But such miniaturization has its limits. For example, the size of the capacitor becomes increasingly larger with regard to the circuit itself, thus taking up considerable chip real estate. Also, in certain applications, the capacitor can become easily disrupted due to radiation or other unwanted external charging events.
By way of example, for certain radiation hardened applications the use of a dual capacitor dual, resistor feedback has been used. These structures, though, take up a considerable amount of real estate and have not been found to be very robust to radiation events, for example. Other applications include a single capacitor and two resistor configuration which is believed to be more robust to exposure to high radiation environments such as space applications. However, this approach places additional requirements on the properties of the capacitor. In particular, both electrodes cannot be contacting any part of the silicon, either diffusion or substrate. If they are a radiation event will upset the SRAM cell, regardless of where the electrons hit the cell. For example, in a radiation environment, electron hole pairs (e.g., carriers of electric charge) will be swept to a voltage potential which, in turn, will disrupt the state of the capacitor.
Also, it is known to use MIMs in radiation and other environments. However, as technology nodes have advanced the capacitance values attainable at practical sizes have not been able to scale with the circuit requirements.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.